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submitted 1 week ago* (last edited 1 week ago) by yogthos@lemmy.ml to c/technology@hexbear.net
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[-] EelBolshevikism@hexbear.net 19 points 1 week ago

finally, environmentally conscious booby generators

[-] Acute_Engles@hexbear.net 13 points 1 week ago

But at what cost

[-] miz@hexbear.net 11 points 1 week ago

incredible things are happening in China

[-] yogthos@lemmy.ml 10 points 1 week ago

China is leaving crackers in the dust.

[-] LesbianLiberty@hexbear.net 9 points 1 week ago

When we have our revolution I hope we'll be able to rebuild our advanced economy with Chinese technology!

[-] peeonyou@hexbear.net 6 points 1 week ago

everybody is saying it

[-] AmericaDelendaEst@hexbear.net 8 points 1 week ago

lol I love this shit with the AI bubble in the west china's just gonna be printing money until it collapses

[-] OptimusSubprime@hexbear.net 7 points 1 week ago

This might be needed to understand how China makes carbon nanotubes (CNTs) in the 1st place:

"Chinese nanotube wire rivals copper in conductivity and could someday be used in space" https://archive.ph/4byIc

[-] yogthos@lemmy.ml 5 points 1 week ago

oh that's fascinating

[-] blame@hexbear.net 6 points 1 week ago

1 TOPS per watt seems more or less in line with what you can get out of an nvidia 4090. In fact with the right kind of data it looks like they're pushing 2-3 TOPS per watt these days. Int8 with 50% sparsity can do 1.3 POPS (1300 TOPS) and the 4090 has a maximum power draw of 450 watts so that works out to about 3 TOPS per watt.

[-] Chronicon@hexbear.net 2 points 1 week ago* (last edited 1 week ago)

yeah I think someone in writing this article got very math-confused

An actual quote from the authors says this:

"The system simulation results show that the carbon-based transistor using the 180 nm technology node can reach 850 MHz and the energy efficiency exceeds 1TOPS/w, which shows obvious advantages over other device technologies at the same technology node."

So it's (in simulations) way more efficient than 180nm silicon, which was achieved around 1999. If it can be brought down to 10 or even 5nm or less, which they think is theoretically possible, it will probably see insane efficiency gains

I can't find anything publicly (damn paywall) about the operations per second achieved by the actual tested chip, which was only 3000 transistors and capable of 2 bit operations. Without knowing that we can't know the actual empirical efficiency. But its so early-days that the simulated result of an 8-bit version is probably more useful information anyhow assuming it's accurate

[-] EelBolshevikism@hexbear.net 3 points 1 week ago

So can this be applied to regular CPUs? Can we have computers that run off the electrical output of an actual potato instead of it just being a joke?

[-] yogthos@lemmy.ml 3 points 1 week ago

In theory yeah, if you can make switches in graphene you should be able to make a general purpose chip.

[-] Chronicon@hexbear.net 3 points 1 week ago

pretty impressive. Probably needs a ton of further development to be manufacture-able though.

However, the fabrication of large-scale CNT ICs with thousands of transistors remains challenging. To start, the semiconducting purity of CNT materials (typically around 99.99%) is too low, so that this requires specialized logic gates to reduce logic errors at the cost of transistor count, area and energy consumption

Furthermore, low driving currents and high-performance variations due to unoptimized fabrication processes limit the scalability, performance and uniformity of large-scale CNT ICs.

Non-tracking link to the study: https://www.nature.com/articles/s41928-024-01211-2 (not on sci-hub yet but someone could request a copy from the authors on ResearchGate and upload it to libgen maybe?)

[-] yogthos@lemmy.ml 2 points 1 week ago

Yeah, gonna take a few years to iron the kinks out. It's nice to know that it does work in principle though.

[-] Chronicon@hexbear.net 1 points 1 week ago* (last edited 1 week ago)

Okay so I read more and I think the headline figure (1700 times more efficient) is made up/due to a significant math error. You might want to correct the title.

The paper claims that a simulated scaled-up 8-bit version of this tech (180nm CNT transistor TPUs) could theoretically reach 1TOPS/W. That is less than the efficiency the author specifies for the google TPU (4TOPS/2W = 2TOPS/W)

Then they go on to speculate that a lower process node will probably improve that efficiency greatly (very likely true, but no figures listed in the public preview of the paper, even simulations)

The author of the article assumed (wrongly) that the actual chip they made could do 1TOPS (it's only 3000 transistors and can only do 2-bit math), and that it consumed 295 microwatts to do so, for an efficiency of 3389TOPS/W. (roughly 1700x the 2TOPS/W of the google chip) That's of course ludicrous.

[-] yogthos@lemmy.ml 2 points 1 week ago

ah yeah good point, updated the title

this post was submitted on 05 Sep 2024
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